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1 词典释义:
npn
时间: 2025-10-29 23:12:48
英 [enpiːˈen]
美 [ˌenˌpiˈen]

abbr. 负-正-负型的(Negative-Positive-Negative的缩写)

双语例句
  • Higher current can be delivered using an external NPN transistor.

    较高的电流可交付使用外部NPN晶体管。

  • The Global switch is available in Reed and both PNP and NPN electronic types.

    全球开关可在里德和两个PNP与NPN电子类型。

  • NPN transistors are normally superior to their PNP counterpart in performance.

    NPN晶体管在性能方面通常优于它们对应的PNP晶体管。

  • Both partially adaptive NPN and deterministic IDO are minimal, deadlock and livelock free.

    部分自适应的NPN和确定性的IDO都是无死锁,无活锁且最短的路由算法。

  • These FAQ's are very generalized. For more detailed and complete information, feel free to browse our NPN Knowledge Base.

    这些常见问题都非常普遍,如果需要更详细的细节与完整资讯,欢迎随时浏览我们的资料库。

  • You can use a cheap NPN transistor such as a 2n2222 to amplify this pulse, to interface with the next stage of electronics.

    你可以使用一个便宜的npn型晶体管,比如2n2222,放大该脉冲到后续电子元件的接口。

  • Objective To investigate the effect of high fiber diet on serum antioxidase system in nasopharyngeal neoplasm(NPN) patients.

    目的观察高膳食纤维饮食对鼻咽癌患者血清中抗氧化酶系统的影响。

  • The earliest IC op amp OUTPUT stages were NPN emitter followers with NPN current sources or resistive pull-downs, as shown in Figure 1.6.

    最初的集成运算放大器的输出级是NPN电流源的NPN放射追随器或通过电阻下拉,如图1.6所示。

  • NPN transistor for switching applications, interface circuit and driver circuit applications. With built-in bias resistors (100 and 100 kOm).

    NPN晶体管开关应用中,接口电路和驱动电路的应用。内置偏置电阻(100和100科姆)。

  • NPN transistor for switching applications, interface circuit and driver circuit applications. With built-in bias resistors (2.2 and 2.2 kOm).

    NPN晶体管开关应用中,接口电路和驱动电路的应用。借助内置的偏置电阻(2.2和2.2科姆)。

  • What's not so well known is that some ordinary NPN transistors such as the 2N2222, 2N3904 and 2N4401 exhibit negative resistance when reversed biased.

    但是,却很少有人知道,一些普通的NPN三极管,如2N2222、2N3904 和 2N4401,在反向偏置时也表现出负阻特性。

  • The 500 mA, NPN Darlington outputs, with integral transient-suppression diodes, are suitable for use with relays, solenoids, and other inductive loads.

    在500毫安,NPN达林顿输出的积分瞬态抑制二极管,是适合于继电器,螺线管和其他感性负载使用。

  • Especially, the circuit of NAND gate my be totally made by NPN transistor, and the circuit structure is simple, easily is complicated by Integrate circuit.

    其与非门电路不仅全部由npn型晶体管构成,且结构非常简单,容易做成集成电路。

  • A major feature of this process is that it produces both PNP and NPN high frequency transistors which makes wide bandwidth designs, such as the HA-5033, practical.

    这一过程的一个主要特点是,它同时生产PNP和NPN晶体管,这使得高频宽带设计,如在HA - 5033,实用。

  • Taking a sensor of switch - output type NPN for example, its structural characteristic of the load driving unit and the driving pattern is introduced in this paper.

    本文以三线制npn式开关量输出型传感器为例,介绍了传感器的负载驱动单元的结构特点及驱动方式。

  • Regardless of type NPN or PNP-type tubes, the internal transistor has three areas, namely, the launch area, base, collector area, the three areas form two PN junction.

    无论npn型还是PNP型管,三极管内部均有三个区、即发射区、基区、集电区,三个区形成两个PN结。

  • Combining the two processes, a compatible technology of SOI full dielectric isolation and complementary bipolar process is experimented. Vertical pup and npn transisto…

    从实验的角度提出了一种SOI材料全介质隔离与高频互补双极工艺兼容的工艺途径。

  • The significance of this article is to propose an effective semi-conductor IC manufacturing process that provides vertical NPN, vertical PNP and lateral PNP transistors.

    本研究对生产实际的指导意义在于,有效的提供了一种半导体集成电路制造工艺,能够同时提供纵向NPN晶体管,纵向PN P晶体管以及横向PN P晶体管。

  • The process is compatible to the existing double poly-silicon self-aligned NPN transistor process, which can be used to fabricate high-performance complementary bipolar circuits.

    该工艺与已有的双层多晶硅自对准NPN晶体管工艺相兼容,可用于制造高性能的互补双极电路。

  • It drives the emitter of an external NPN transistor, and series with transformer to consist a flyback topology. The system is offline through the use of transformers and optocoupler transistor.

    控制器驱动外部NPN晶体管的射极,并与变压器串联构成反激式拓扑,系统通过变压器和光耦实现离线式的要求。

  • Finally the integrated circuit has a first voltage level controller provided to split the voltage needed to program the NPN-transistor over the first and at least second current feeding circuit.

    最后,所述集成电路包括一第一电压电平控制器,所述第一电压电平控制器设置成在所述第一及至少第二电流馈电电路上分离对所述npn晶体管进行编程所需的电压。